US 12,436,696 B2
On-demand regulation of memory bandwidth utilization to service requirements of display
Ashish Jain, Austin, TX (US); Shang Yang, Markham (CA); Jun Lei, Markham (CA); Gia Tung Phan, Markham (CA); Oswin Hall, Markham (CA); Benjamin Tsien, Santa Clara, CA (US); and Narendra Kamat, Santa Clara, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed on Sep. 29, 2022, as Appl. No. 17/936,809.
Prior Publication US 2024/0111442 A1, Apr. 4, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0634 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a control circuit, wherein responsive to determining that a condition for changing a performance state of a memory subsystem is satisfied, the control circuit is configured to:
cause a reduction in memory bandwidth of a client configured to generate memory accesses to the memory subsystem; and
cause a display controller to prefetch display data from the memory subsystem, during a period of time that the client has its memory bandwidth reduced.