| CPC G06F 3/0622 (2013.01) [G06F 3/0658 (2013.01); G06F 3/0659 (2013.01); H04L 9/3242 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |

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1. A memory controller to control a memory device including a secure storage area, the memory controller comprising:
a host interface configured to receive a command and data segments from a host, the command including information for authentication requesting access to the secure storage area;
a processor configured to generate a device authentication code based on the information for the authentication; and
a memory interface configured to access the secure storage area under control of the processor,
wherein the processor is configured to repeat at least a portion of an operation of generating the device authentication code whenever receiving an individual data segment among the data segments while the host interface or the memory interface receives the data segments, following the command.
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