| CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] | 15 Claims |

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1. An apparatus comprising:
instruction receiving circuitry configured to receive an instruction to be executed, the instruction being an instruction identifying given data to be written to a storage;
instruction implementation circuitry configured to determine a sequence of operations corresponding to said instruction, wherein the instruction implementation circuitry is configured to:
responsive to the given data identified by said instruction having a value of zero, determine the sequence of operations corresponding to said instruction to include a first operation for writing one or more zeroes to the storage, the first operation being a dedicated zero-writing operation; and
responsive to the given data identified by said instruction having a non-zero value, determine the sequence of operations corresponding to said instruction to include one or more second operations for writing the non-zero value to the storage, the one or more second operations being different from the first operation, and
execution circuitry to perform the determined sequence of operations.
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