| CPC G06F 3/061 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0673 (2013.01)] | 10 Claims |
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1. An electronic device comprising:
a processor; and
a memory electrically connected to the processor,
wherein the processor is configured to:
select, between a first rank and a second rank, a rank comprising bank groups of the memory,
select a bank corresponding to a memory address to be accessed from among banks included in the selected rank,
select a row and one or more columns from among rows and columns of the selected bank, and
generate the memory address to access the memory based on an address mapping scheme according to the selected rank, the selected bank, the selected row, and the selected one or more columns, wherein when the first rank is selected, reshuffling of an order of the generated address is prevented, and wherein when the second rank is selected, reshuffling of the order of the generated address is not prevented.
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