US 12,436,634 B2
Display panel, display device, input/output device, and data processing device
Hisao Ikeda, Kanagawa (JP); Masataka Nakada, Tochigi (JP); and Tomoya Aoyama, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
Filed on Mar. 18, 2024, as Appl. No. 18/607,654.
Application 18/607,654 is a continuation of application No. 17/269,042, granted, now 11,968,863, previously published as PCT/IB2019/057029, filed on Aug. 21, 2019.
Claims priority of application No. 2018-160323 (JP), filed on Aug. 29, 2018.
Prior Publication US 2024/0224676 A1, Jul. 4, 2024
Int. Cl. H10K 59/13 (2023.01); G06F 3/041 (2006.01); H10K 59/00 (2023.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 59/80 (2023.01)
CPC G06F 3/0412 (2013.01) [H10K 59/00 (2023.02); H10K 59/121 (2023.02); H10K 59/131 (2023.02); H10K 59/1315 (2023.02); H10K 59/80522 (2023.02)] 10 Claims
OG exemplary drawing
 
1. A display device comprising:
a transistor;
a first insulating film over the transistor;
a first conductive film over the first insulating film, the first conductive film configured to serve as a first electrode of a display element;
a second conductive film over the first insulating film, the second conductive film comprising the same material as the first conductive film;
a second insulating film comprising a first opening portion overlapping with the first conductive film, the second insulating film comprising a region overlapping with a peripheral edge of the first conductive film;
a layer comprising a light-emitting material, the layer comprising a first region in the first opening portion of the second insulating film, a second region overlapping with the second insulating film, and a third region overlapping with the second conductive film; and
a third conductive film over the layer,
wherein a top surface of the third conductive film comprises a first step in a region overlapping with the second conductive film through the layer and not overlapping with the second insulating film,
wherein the top surface of the third conductive film comprises a second step in a region overlapping with the second conductive film and not overlapping with the layer,
wherein the layer comprises a second opening portion overlapping with the second conductive film and not overlapping with the second insulating film,
wherein the layer comprises a region in contact with the second conductive film, and
wherein the third conductive film is electrically connected to the second conductive film through the second opening portion of the layer.