US 12,436,554 B2
Integrated circuit and electronic device including the same
Jungmoon Kim, Suwon-si (KR); Jeongpyo Kim, Seoul (KR); Insuk Kim, Suwon-si (KR); and Yeonjeong Lee, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jun. 27, 2024, as Appl. No. 18/756,699.
Application 18/756,699 is a continuation of application No. 17/721,541, filed on Apr. 15, 2022, granted, now 12,032,399.
Claims priority of application No. 10-2021-0049310 (KR), filed on Apr. 15, 2021; and application No. 10-2021-0081043 (KR), filed on Jun. 22, 2021.
Prior Publication US 2024/0345611 A1, Oct. 17, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G05F 1/575 (2006.01); G09G 3/20 (2006.01)
CPC G05F 1/575 (2013.01) [G09G 3/20 (2013.01); G09G 2330/021 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a power supply circuit configured to generate a supply voltage based on at least one of first and second power source voltages; and
a system load configured to operate by receiving the supply voltage through an output node of the power supply circuit,
wherein the power supply circuit comprises:
a first low drop-output (LDO) regulator configured to generate, based on the first power source voltage, a first load current flowing to the system load through the output node; and
a second LDO regulator configured to generate a second load current flowing to the system load through the output node, based on the second power source voltage and drop of the supply voltage.