CPC H10K 77/111 (2023.02) [C08G 73/1071 (2013.01); H10K 50/844 (2023.02); H10K 50/86 (2023.02); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/124 (2023.02); H10K 59/126 (2023.02); H10K 59/40 (2023.02); H10K 59/65 (2023.02); G02F 1/133331 (2021.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 27/14678 (2013.01); H01L 29/78633 (2013.01); H01L 29/7869 (2013.01); H10K 59/122 (2023.02); H10K 2102/00 (2023.02); H10K 2102/311 (2023.02)] | 20 Claims |
1. A display panel including a transmission area, the display panel comprising:
a substrate;
a first pixel circuit and a second pixel circuit over the substrate, spaced from each other with the transmission area between the first pixel circuit and the second pixel circuit, and each including transistors and a storage capacitor;
a conductive layer positioned between the substrate and the transistors;
a first display element electrically connected to the first pixel circuit; and
a second display element electrically connected to the second pixel circuit,
wherein the transistors of the first pixel circuit and the transistors of the second pixel circuit respectively comprise semiconductor layers, and wherein at least one of the semiconductor layers includes an oxide semiconductor material.
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