US 12,108,646 B2
Display panel and display apparatus including the same
Seunglyong Bok, Yongin-si (KR); Okkyung Park, Yongin-si (KR); and Youngran Son, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Jul. 24, 2023, as Appl. No. 18/358,009.
Application 18/358,009 is a continuation of application No. 17/207,420, filed on Mar. 19, 2021, granted, now 11,711,953.
Claims priority of application No. 10-2020-0112545 (KR), filed on Sep. 3, 2020.
Prior Publication US 2023/0371332 A1, Nov. 16, 2023
Int. Cl. H10K 59/131 (2023.01); G09G 3/3266 (2016.01); H10K 59/121 (2023.01)
CPC H10K 59/131 (2023.02) [G09G 3/3266 (2013.01); H10K 59/121 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A display panel comprising:
a substrate comprising a main display area, a first component area, a second component area, and a peripheral area;
a first subpixel on the main display area, and a first pixel circuit connected to the first subpixel;
a second subpixel on the first component area;
a second pixel circuit spaced apart from the second subpixel;
a connection wiring connecting the second subpixel to the second pixel circuit;
a main scan line extending in a first direction; and
a scan connection line connected to the main scan line,
wherein the scan connection line is in the peripheral area.
 
10. A display panel comprising:
a substrate comprising a main display area, a first component area, a second component area, and a peripheral area;
a first subpixel on the main display area and a first pixel circuit connected to the first subpixel;
a second subpixel on the first component area;
a second pixel circuit spaced apart from the second subpixel; and
a connection wiring connecting the second subpixel to the second pixel circuit,
wherein no subpixels are located in the second component area,
wherein the second pixel circuit is between the first component area and the second component area.
 
13. A display panel comprising:
a substrate comprising a main display area, a first component area, a second component area, and a peripheral area;
a first subpixel on the main display area and a first pixel circuit connected to the first subpixel;
a second subpixel on the first component area;
a second pixel circuit spaced apart from the second subpixel;
a first connection wiring connecting the second subpixel to the second pixel circuit;
a third subpixel on the second component area;
a third pixel circuit spaced apart from the third subpixel; and
a second connection wiring connecting the third subpixel to the third pixel circuit,
wherein the second pixel circuit or the third pixel circuit is between the first component area and the second component area.