US 12,108,535 B2
Printed circuit board and printed circuit board package
Kwang Yun Kim, Suwon-si (KR); Seung Eun Lee, Suwon-si (KR); and Yong Hoon Kim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on Apr. 7, 2022, as Appl. No. 17/715,266.
Claims priority of application No. 10-2021-0170148 (KR), filed on Dec. 1, 2021.
Prior Publication US 2023/0171895 A1, Jun. 1, 2023
Int. Cl. H01S 5/18 (2021.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01); H01S 5/183 (2006.01)
CPC H05K 1/186 (2013.01) [H05K 1/0298 (2013.01); H01S 5/183 (2013.01); H05K 2201/096 (2013.01); H05K 2201/10053 (2013.01); H05K 2201/10151 (2013.01); H05K 2201/2081 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A printed circuit board (PCB) comprising: a substrate including a first insulating layer and a plurality of first wiring patterns disposed on an upper surface of the first insulating layer, and a cavity is provided in the first insulating layer; an optical sensing chip including a vertical cavity surface emitting laser (VCSEL) and a photodiode, disposed in the cavity, and connected to at least one of the plurality of first wiring patterns; a transimpedance amplifier (TIA) chip disposed to be spaced apart from the optical sensing chip in the cavity, and connected to at least one first wiring pattern, different from the first wiring pattern connected to the optical sensing chip, among the plurality of first wiring patterns; and a dielectric layer stacked on the substrate and having a hole exposing the VCSEL and the photodiode of the optical sensing chip, wherein the optical sensing chip and the transimpedance amplifier chip are connected through a wiring pattern disposed on the dielectric layer, and wherein the dielectric layer is disposed in a space between each of the optical sensing chip and the transimpedance amplifier chip, and a wall of the cavity.