| CPC H04N 23/617 (2023.01) [G06N 3/02 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H04N 23/665 (2023.01); H04N 23/80 (2023.01); H04N 25/443 (2023.01)] | 20 Claims |
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1. An apparatus comprising:
a pixel cell array, each pixel cell in the pixel cell array including a photodiode and processing circuits, the photodiodes being formed in a first semiconductor substrate and the processing circuits formed in one or more second semiconductor substrates; and
a controller formed in at least one of the one or more second semiconductor substrates, the first semiconductor substrate and the one or more second semiconductor substrates forming a stack and housed within a semiconductor package;
wherein the pixel cell array is configured to:
capture pixel data at a first time;
generate, based on the pixel data and first programming signals received from the controller, a first image frame, the first programming signals identifying a first plurality of pixels in the pixel cell array;
generate a second image frame based on the pixel data and second programming signals, the second programming signals identifying a second plurality of pixels in the pixel cell array and having a different sparsity of pixels from the first image frame;
transmit the first image to a host processor; and
transmit the first image frame or the second image frame to the controller; and
wherein the controller is configured to:
receive the first image frame or the second image frame from the pixel cell array;
receive updated programming signals from the host processor, the updated programming signals being determined by the host processor based on the first image frame;
update the second programming signals based on the updated programming signals; and
control the pixel cell array to:
capture second pixel data at a second time; and
generate subsequent first and second image frames at the second time, the subsequent second image frame based on the updated second programming signals.
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