US 12,108,064 B2
Memory system
Daisuke Yashima, Tachikawa (JP); Masato Sumiyoshi, Yokohama (JP); Keiri Nakanishi, Kawasaki (JP); Takashi Miura, Yokohama (JP); Kohei Oikawa, Kawasaki (JP); Sho Kodama, Kawasaki (JP); Youhei Fukazawa, Kawasaki (JP); and Zheye Wang, Kawasaki (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Oct. 2, 2023, as Appl. No. 18/479,521.
Application 18/479,521 is a division of application No. 17/868,597, filed on Jul. 19, 2022, granted, now 11,818,376.
Application 17/868,597 is a division of application No. 17/019,941, filed on Sep. 14, 2020, granted, now 11,431,995, issued on Aug. 30, 2022.
Claims priority of application No. 2020-042839 (JP), filed on Mar. 12, 2020.
Prior Publication US 2024/0031588 A1, Jan. 25, 2024
Int. Cl. H04N 19/423 (2014.01); H04N 19/13 (2014.01); H04N 19/146 (2014.01); H04N 19/184 (2014.01)
CPC H04N 19/423 (2014.11) [H04N 19/13 (2014.11); H04N 19/146 (2014.11); H04N 19/184 (2014.11)] 29 Claims
OG exemplary drawing
 
1. A memory system comprising:
an encoding unit, implemented by circuitry, configured to:
assign, using a table in which a plurality of entries each including a symbol and a frequency value associated with the symbol are arranged in a first order, codewords to symbols, respectively, according to the first order, the symbols being included in the plurality of entries, respectively; and
convert one or more input first symbols into one or more first codewords, respectively;
a frequency value update unit, implemented by the circuitry, configured to add a first value to each of one or more first frequency values that are associated with the one or more first symbols, respectively, in one or more entries in the table that include the one or more first symbols, respectively;
a first intra-group rearranging unit, implemented by the circuitry, configured to rearrange first entries in the table, which belong to a first group, using frequency values in the first entries, after the first value is added to each of the one or more first frequency values;
a second intra-group rearranging unit, implemented by the circuitry, configured to rearrange second entries in the table, which belong to a second group lower in the table than the first group, using frequency values in the second entries, after the first value is added to each of the one or more first frequency values;
a first candidate rearranging unit, implemented by the circuitry, configured to rearrange third entries in the table using frequency values in the third entries, after the first value is added to each of the one or more first frequency values, the third entries being obtained by excluding a lowest fourth entry from fifth entries that belong to a third group lower than the second group;
a second candidate rearranging unit, implemented by the circuitry, configured to rearrange sixth entries in the table using frequency values in the sixth entries, after the first value is added to each of the one or more first frequency values, the sixth entries being obtained by excluding a highest seventh entry from eighth entries that belong to a fourth group lower than the third group;
a third intra-group rearranging unit, implemented by the circuitry, configured to rearrange ninth entries in the table, which belong to a fifth group lower than the fourth group, using frequency values in the ninth entries, after the first value is added to each of the one or more first frequency values;
a fourth intra-group rearranging unit, implemented by the circuitry, configured to rearrange tenth entries in the table, which belong to a sixth group lower than the fifth group, using frequency values in the tenth entries, after the first value is added to each of the one or more first frequency values;
an inter-group rearranging unit, implemented by the circuitry, configured to rearrange the fourth entry and the seventh entry in the table when a frequency value in the fourth entry is smaller than a frequency value in the seventh entry after the first value is added to each of the one or more first frequency values; and
a routing unit, implemented by the circuitry, configured to:
rearrange a lowest entry of the rearranged third entries so as to be located at a lowest position in the third group, and a highest entry of the rearranged sixth entries so as to be located at a highest position in the fourth group;
rearrange, when the fourth entry and the seventh entry are rearranged, a lowest entry of the rearranged first entries and a lowest entry of the rearranged second entries so as to be located at positions other than a lowest position in the third group, the seventh entry so as to be located in the first group or the second group, a highest entry of the rearranged ninth entries and a highest entry of the rearranged tenth entries so as to be located at positions other than a highest position in the fourth group, and the fourth entry so as to be located in the fifth group or the sixth group; and
rearrange, when the fourth entry and the seventh entry are not rearranged, the lowest entry of the rearranged first entries and the lowest entry of the rearranged second entries so as to be located at positions other than the lowest position in the third group, the fourth entry so as to be located in the first group or the second group, the highest entry of the rearranged ninth entries and the highest entry of the rearranged tenth entries so as to be located at positions other than the highest position in the fourth group, and the seventh entry so as to be located in the fifth group or the sixth group,
wherein the encoding unit is configured to:
assign the codewords to the symbols, respectively, according to a second order in which the plurality of entries are arranged in the table that is updated by the frequency value update unit, the first intra-group rearranging unit, the second intra-group rearranging unit, the first candidate rearranging unit, the second candidate rearranging unit, the third intra-group rearranging unit, the fourth intra-group rearranging unit, the inter-group rearranging unit, and the routing unit; and
convert one or more second symbols, which are input following the one or more first symbols, into one or more second codewords, respectively.