determining, using a hardware processor, a received signal (r) and a structure of LMMSE filter (Ψ) using a MIMO-OTFS channel (H);

reordering, using the hardware processor, the LMMSE filter (Ψ) to reduce a bandwidth of the LMMSE filter (Ψ), wherein the reordering of the LMMSE filter (Ψ) is performed using a reverse Cuthil-mckee technique, and wherein the reverse Cuthil-mckee technique determines a permutation operation (P) to reorder the LMMSE filter (Ψ);

determining, using the hardware processor, a low-complexity inverse operation (G⁻¹=U⁻¹L⁻¹) of an operation G based on the LMMSE filter (Ψ) and the permutation operation (P) and with a transpose of the permutation operation (P^T) using a Cholskey decomposition technique, wherein L is a lower triangular banded representation of the operation G with the bandwidth (B_w), and wherein U is an upper triangular banded representation of the operation G with the bandwidth (B_w);

determining, using the hardware processor, LMMSE/ZF equalized signal (r_ce) based on the low complexity inverse operation and a processed signal (r=Pr) using forward substitution technique and backward substitution technique, wherein a signal r is determined based on the MIMO-OTFS channel (H) and the received signal r;

reordering, using the hardware processor, the LMMSE/ZF equalized signal (r_ce) to determine a first signal (y), wherein the first signal (y) is determined based on the transpose of the permutation operation (P^T) and the LMMSE/ZF equalized signal (r_ce); and

determining, using the hardware processor, a low-complexity LMMSE/ZF estimate of a data signal (d) that represents the low-complexity LMMSE/ZF receivers based on unitary function (B) and the first signal (y),

wherein the designing of the LMMSE/ZF receivers comprises a combination of Minimum Mean Squared Error (MMSE) equalization technique and Orthogonal time frequency space (OTFS) matched filtering technique.