CPC H04B 1/713 (2013.01) [H04J 13/18 (2013.01); H04L 27/26 (2013.01); H04W 28/04 (2013.01); H04W 72/04 (2013.01)] | 7 Claims |
1. An integrated circuit comprising:
setting circuitry, which, in operation, controls setting a retuning time, when retuning from a first narrowband for transmitting a first channel in a first subframe to a second narrowband for transmitting a second channel in a second subframe, the second subframe being consecutive to the first subframe along a time axis; and
reception circuitry, which, in operation, controls receiving the first channel and the second channel, wherein:
when the first channel and the second channel are a PUCCH (Physical Uplink Control Channel) for transmitting a channel state information (CSI), a last symbol of the first subframe and a first symbol of the second subframe are set as the retuning time, and at least one of the CSI is punctured for the retuning time.
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