a charge injection digital to analog converter circuit comprising a plurality of capacitors and a plurality of charge injection circuits, wherein the plurality of capacitors are configured to respectively sample a plurality of input signals to generate a first signal and a second signal, and the plurality of charge injection circuits are configured to selectively adjust at least one of the first signal or the second signal according to a plurality of enable signals and a plurality of decision signals;

a comparator circuit configured to compare the first signal with the second signal to generate the plurality of decision signals; and

a control logic circuitry configured to control a first charge injection circuit in the plurality of charge injection circuits to adjust the first signal and the second signal during an initial phase to adjust a switching sequence of the first charge injection circuit according to the plurality of decision signals corresponding to the initial phase, and generate the plurality of enable signals according to the plurality of decision signals and an adjusted switching sequence during an analog to digital conversion phase, in order to generate a digital output,

wherein the control logic circuitry is further configured to store a corresponding relation between the plurality of enable signals and the adjusted switching sequence.