US 12,107,592 B2
Comparator offset correction
Kenneth Stephen Hunt, Maidenhead (GB); Antoine Morineau, Maidenhead (GB); and Aadilhussain Maniyar, Maidenhead (GB)
Assigned to SOCIONEXT INC., Kanagawa (JP)
Filed by Socionext Inc., Kanagawa (JP)
Filed on Jul. 14, 2022, as Appl. No. 17/864,966.
Claims priority of application No. 21191384 (EP), filed on Aug. 13, 2021.
Prior Publication US 2023/0046171 A1, Feb. 16, 2023
Int. Cl. H03M 1/06 (2006.01); H03K 5/24 (2006.01)
CPC H03M 1/0607 (2013.01) [H03K 5/2481 (2013.01); H03K 5/249 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A comparator comprising:
first and second input transistors connected to control signals at first and second nodes of the comparator based on first and second input signals, respectively; and
latch circuitry configured to generate a comparator output signal indicative of successive comparison results based on the signals at the first and second nodes, each comparison result indicating whether a magnitude of the first input signal is determined to be larger than a magnitude of the second input signal or vice versa,
wherein the comparator further comprises:
at least one controllable offset-correction component having an input terminal and connected to control the signal at one of the first and second nodes based on an offset-correction signal provided at its input terminal;
for each controllable offset-correction component, an offset correction circuit configured to provide the offset-correction signal provided at its input terminal; and
control circuitry,
wherein:
the at least one offset-correction circuit comprises a holding capacitor, a supply capacitor and switching circuitry, the holding capacitor connected to the input terminal of the offset-correction component concerned and configured to provide the offset-correction signal at the input terminal concerned based on charge stored on that holding capacitor;
for the at least one offset-correction circuit, the switching circuitry is configured, in a charging operation, to connect the supply capacitor to a charging-operation voltage supply to store charge on that capacitor, and, in a charge-sharing operation, to disconnect the supply capacitor from the charging-operation voltage supply and connect it to the holding capacitor to adjust the charge stored on the holding capacitor and thereby adjust the offset-correction signal; and
the control circuitry is configured, based on a control signal, to control the at least one offset-correction circuit to:
control an amount by which the offset-correction signal is adjusted, wherein the control circuitry comprises determination circuitry configured to determine a target amount of adjustment of the offset-correction signal, and to control the control signal to control the amount by which the offset-correction signal is adjusted to bring that amount to or towards the target amount; and/or
in a bypass operation, connect the input terminal of the at least one controllable offset-correction component to a bypass-operation reference voltage supply to control the offset-correction signal based on a voltage level of the bypass-operation voltage supply, the bypass-operation voltage supply being the charging-operation voltage supply or another voltage supply; and/or
in a maintenance operation between instances of a charging operation followed by a charge-sharing operation, control the charging-operation voltage supply and/or the bypass-operation voltage supply to control leakage of the charge stored on the holding capacitor,
wherein for the at least one offset-correction circuit, the switching circuitry comprises a charging switch connected between the supply capacitor and the charging-operation voltage supply and a sharing switch connected between the supply capacitor and the holding capacitor; and
the control circuitry is configured, for the at least one offset-correction circuit, to control the switching circuitry to:
turn the charging switch ON and the sharing switch OFF to carry out the charging operation; and/or
turn the charging switch OFF and the sharing switch ON to carry out the charge-sharing operation; and/or
turn the charging switch ON and the sharing switch ON to carry out the bypass operation; and/or
turn the charging switch OFF and the sharing switch OFF to carry out the maintenance operation,
wherein for the at least one offset-correction circuit, the charging switch comprises a first charging switch connected between a first reference voltage supply and the supply capacitor and a second charging switch connected between a second reference voltage supply and the supply capacitor.