a diode-connected MOS transistor having a drain terminal connected to an input node and source terminal connected to a reference voltage node, the diode-connected MOS transistor being configured to pass a reference current from the input node to the reference voltage node;

a plurality of ordered mirroring MOS transistors having respective gate terminals connected to a gate terminal of the diode-connected MOS transistor and respective drain terminals alternatively couplable either to a first current node or to a second current node as a function of a plurality of respective ordered control signals, wherein a first mirroring MOS transistor in the plurality of ordered mirroring MOS transistors has a source terminal directly connected to the reference voltage node; and

a plurality of current control MOS transistors having respective gate terminals connected to the gate terminal of the diode-connected MOS transistor, wherein each current control MOS transistor is arranged between source terminals of two consecutive mirroring MOS transistors in the plurality of ordered mirroring MOS transistors, wherein

the diode-connected MOS transistor and the plurality of ordered mirroring MOS transistors all have the same channel dimensions,

the plurality of current control MOS transistors all have the same channel dimensions,

channels of the plurality of current control MOS transistors have a same length and twice a width of a channel of the diode-connected MOS transistor, and

mirroring MOS transistors of the plurality of ordered mirroring MOS transistors whose source terminals are not directly connected to the reference voltage node have respective bulk terminals configured to receive one or more compensation signals, the one or more compensation signals having respective values that decrease with increasing temperature.