US 12,107,590 B2
Digital correction of digital-to-analog converter errors in continuous-time analog-to-digital converters
Sharvil Pradeep Patil, Toronto (CA); Asha Ganesan, Markham (CA); Hajime Shibata, Toronto (CA); Donald W. Paterson, Winchester, MA (US); and Haiyang Zhu, Winchester, MA (US)
Assigned to Analog Devices International Unlimited Company, Limerick (IE)
Filed by Analog Devices International Unlimited Company, Limerick (IE)
Filed on Oct. 24, 2022, as Appl. No. 18/049,278.
Claims priority of provisional application 63/403,947, filed on Sep. 6, 2022.
Prior Publication US 2024/0080033 A1, Mar. 7, 2024
Int. Cl. H03M 1/06 (2006.01); H03M 1/10 (2006.01); H03M 1/16 (2006.01)
CPC H03M 1/0604 (2013.01) [H03M 1/1038 (2013.01); H03M 1/1047 (2013.01); H03M 1/164 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A continuous-time (CT) analog-to-digital converter (ADC), comprising:
a delay circuit, configured to generate a delay circuit output signal by applying a delay to an analog input signal;
a sub-ADC, configured to generate a sub-ADC output signal based on the analog input signal;
an error correction circuit, configured to generate a digital error-corrected signal based on the sub-ADC output signal; and
a digital reconstruction filter (DRF) combiner, configured to generate an ADC output signal based on the digital error-corrected signal.