| CPC H02J 50/12 (2016.02) [H02J 50/80 (2016.02); H02M 7/5395 (2013.01); H02J 2207/20 (2020.01)] | 20 Claims |
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1. An electronic device capable of wireless power transfer, the electronic device comprising:
a power source;
a transmission coil;
a full bridge inverter electrically connected to the power source and the transmission coil; and
a control circuit configured to:
communicate with an external device through the transmission coil, and
control the full bridge inverter to transmit a power signal through the transmission coil,
wherein the full bridge inverter comprises:
a first switch that is electrically connected to one end of the transmission coil, the first switch being turned on in response to a first gate signal of the control circuit,
a second switch that is electrically connected to the one end of the transmission coil, the second switch being turned on in response to a second gate signal of the control circuit,
a third switch that is electrically connected to the other end of the transmission coil, the third switch being turned on in response to a third gate signal of the control circuit, and
a fourth switch that is electrically connected to the other end of the transmission coil, the fourth switch being turned on in response to a fourth gate signal of the control circuit,
wherein the control circuit is further configured to:
receive a first control signal requesting to lower a power of the power signal to less than a specified power from the external device, and
adjust a duty cycle of each of the first to fourth gate signals in response to the first control signal, and switch to a pulse width modulation (PWM) driving state in which an operation corresponding to a first period and an operation corresponding to a second period are alternately repeated,
wherein, during the first period, the control circuit is further configured to activate the first gate signal and the third gate signal, and deactivate the second gate signal and the fourth gate signal, where the duty cycle of the third gate signal is set to be greater than the duty cycle of the first gate signal, and
wherein, during the second period, the control circuit is further configured to activate the first gate signal and the third gate signal, and deactivate the second gate signal and the fourth gate signal, where the duty cycle of the first gate signal is set to be greater than the duty cycle of the third gate signal.
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