CPC H01Q 13/0241 (2013.01) [H01Q 1/50 (2013.01); H01Q 15/24 (2013.01)] | 20 Claims |
1. A circuit board comprising:
a plurality of metal layers separated by dielectric;
a first patch antenna formed in a first metal layer of the plurality of metal layers, the first patch antenna including a first pair of signal feeds;
a first delay line formed in the first metal layer and connecting the first pair of signal feeds to a first excitation via;
a second patch antenna formed in a second metal layer of the plurality of metal layers, the second patch antenna including a second pair of signal feeds, wherein the first patch antenna and the second patch antenna are stacked; and
a second delay line formed in the second metal layer and connecting the second pair of signal feeds to a second excitation via.
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