US 12,107,188 B2
Semiconductor device
Duk Hyun Park, Seoul (KR); Byung Hak Jeong, Seoul (KR); and Jee Yun Lee, Seoul (KR)
Assigned to SUZHOU LEKIN SEMICONDUCTOR CO., LTD., Suzhou (CN)
Appl. No. 17/255,576
Filed by SUZHOU LEKIN SEMICONDUCTOR CO., LTD., Taicang (CN)
PCT Filed Jul. 2, 2019, PCT No. PCT/KR2019/007990
§ 371(c)(1), (2) Date Dec. 23, 2020,
PCT Pub. No. WO2020/013501, PCT Pub. Date Jan. 16, 2020.
Claims priority of application No. 10-2018-0080726 (KR), filed on Jul. 11, 2018.
Prior Publication US 2021/0288219 A1, Sep. 16, 2021
Int. Cl. H01L 33/38 (2010.01); H01L 33/40 (2010.01); H01L 33/62 (2010.01)
CPC H01L 33/382 (2013.01) [H01L 33/405 (2013.01); H01L 33/62 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a bonding layer disposed on the substrate;
an electrode layer disposed on the bonding layer;
a semiconductor structure disposed on the electrode layer and including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer;
a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer;
an intermediate layer disposed between the first electrode and the first conductive semiconductor layer;
a reflective layer disposed on the first electrode and the first conductive semiconductor layer, the reflective layer surrounding the intermediate layer and the first electrode and contacting sidewalls of the intermediate layer and sidewalls of the first electrode;
a capping layer disposed on the reflective layer and contacting a top surface of the first conductive semiconductor layer; and
a first electrode pad disposed on the capping layer, the first electrode pad being spaced apart from the first electrode and the intermediate layer in a lateral direction, such that the first electrode pad does not overlap with the first electrode in a vertical direction perpendicular to the lateral direction,
wherein the second conductive semiconductor layer includes a through-hole, and the second electrode is disposed in the through-hole and electrically connected to the electrode layer,
wherein electrode layer includes a groove,
wherein the second electrode is disposed in the groove, and
wherein an area ratio of an area of the first conductive semiconductor layer and an area of the intermediate layer is in a range of 1:0.02 to 1:0.06.