US 12,107,149 B2
Air spacer and method of forming same
Ming-Jhe Sie, Taipei (TW); Chen-Huang Huang, Hsinchu (TW); Shao-Hua Hsu, Taitung (TW); Cheng-Chung Chang, Kaohsiung (TW); Szu-Ping Lee, Changhua (TW); An Chyi Wei, Hsinchu (TW); Shiang-Bau Wang, Pingzchen (TW); and Chia-Jen Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 18, 2023, as Appl. No. 18/302,474.
Application 18/302,474 is a continuation of application No. 17/752,680, filed on May 24, 2022, granted, now 11,652,155.
Application 17/752,680 is a continuation of application No. 16/917,577, filed on Jun. 30, 2020, granted, now 11,349,014, issued on May 31, 2022.
Prior Publication US 2023/0253479 A1, Aug. 10, 2023
Int. Cl. H01L 29/66 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/66545 (2013.01) [H01L 21/76832 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01); H01L 29/66553 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first gate structure and a second gate structure over an isolation region;
a first spacer along a sidewall of the first gate structure, a top surface of the isolation region, and a sidewall of the second gate structure, in a first cross-section the first spacer comprising a first U-shape;
a second spacer interposed between the sidewall of the first gate structure and the sidewall of the second gate structure, in the first cross-section the second spacer comprising a second U-shape within the first U-shape;
an air gap along the first spacer, in the first cross-section the air gap being partially bounded by the first spacer and the second spacer; and
a source/drain region interposed between the air gap and the second spacer.