US 12,107,097 B2
Solid-state imaging device and electronic apparatus
Tetsuya Uchida, Kanagawa (JP); Ryoji Suzuki, Kanagawa (JP); Yoshiharu Kudoh, Kanagawa (JP); Hiroyuki Mori, Kanagawa (JP); and Harumi Tanaka, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed on Apr. 28, 2023, as Appl. No. 18/309,122.
Application 18/309,122 is a division of application No. 16/758,537, granted, now 11,652,115, previously published as PCT/JP2018/041669, filed on Nov. 9, 2018.
Claims priority of application No. 2017-216078 (JP), filed on Nov. 9, 2017; application No. 2018-190802 (JP), filed on Oct. 9, 2018; and application No. 2018-208680 (JP), filed on Nov. 6, 2018.
Prior Publication US 2023/0261014 A1, Aug. 17, 2023
Int. Cl. H01L 27/146 (2006.01)
CPC H01L 27/1461 (2013.01) [H01L 27/14621 (2013.01); H01L 27/14623 (2013.01); H01L 27/14627 (2013.01); H01L 27/1463 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/14645 (2013.01); H01L 27/14685 (2013.01); H01L 27/14689 (2013.01)] 20 Claims
OG exemplary drawing
 
11. An electronic apparatus, comprising:
an optical system;
a solid-state imaging device that receives light from the optical system,
the solid-state imaging device including:
a photoelectric conversion section that performs photoelectric conversion;
a charge retaining section that temporarily retains electric charge converted by the photoelectric conversion section; and
a first trench formed in a semiconductor substrate between the photoelectric conversion section and the charge retaining section,
wherein the first trench being lower than the photoelectric conversion section and higher than the charge retaining section in a depth direction of the semiconductor substrate; and
a digital signal processor that processes signals received from the solid-state imaging device.