US 12,107,061 B2
Integrated circuit device including peripheral circuit and cell array structures, and electronic system including same
Homoon Shin, Hwaseong-si (KR); Jooyong Park, Hwaseong-si (KR); Hongsoo Jeon, Suwon-si (KR); and Pansuk Kwak, Goyang-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 28, 2021, as Appl. No. 17/513,132.
Claims priority of application No. 10-2020-0170752 (KR), filed on Dec. 8, 2020.
Prior Publication US 2022/0181284 A1, Jun. 9, 2022
Int. Cl. H01L 25/065 (2023.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01)
CPC H01L 24/08 (2013.01) [H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a peripheral circuit structure and a cell array structure,
wherein the peripheral circuit structure includes a circuit substrate, a peripheral circuit on the circuit substrate, a first insulating layer covering the circuit substrate and the peripheral circuit, and a first bonding pad in the first insulating layer,
the cell array structure includes an insulating structure having a first surface and an opposing second surface, a conductive plate on the first surface of the insulating structure, a memory cell array on the conductive plate, a second insulating layer covering the first surface of the insulating structure, the conductive plate, and the memory cell array, a second bonding pad arranged in the second insulating layer in contact with the first bonding pad, a line on the second surface of the insulating structure, and a conductive via penetrating the insulating structure and connecting the conductive plate to the line, and
the integrated circuit device further comprises contact plugs electrically connecting the line to the peripheral circuit.