CPC H01L 24/08 (2013.01) [H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] | 20 Claims |
1. An integrated circuit device comprising:
a peripheral circuit structure and a cell array structure,
wherein the peripheral circuit structure includes a circuit substrate, a peripheral circuit on the circuit substrate, a first insulating layer covering the circuit substrate and the peripheral circuit, and a first bonding pad in the first insulating layer,
the cell array structure includes an insulating structure having a first surface and an opposing second surface, a conductive plate on the first surface of the insulating structure, a memory cell array on the conductive plate, a second insulating layer covering the first surface of the insulating structure, the conductive plate, and the memory cell array, a second bonding pad arranged in the second insulating layer in contact with the first bonding pad, a line on the second surface of the insulating structure, and a conductive via penetrating the insulating structure and connecting the conductive plate to the line, and
the integrated circuit device further comprises contact plugs electrically connecting the line to the peripheral circuit.
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