US 12,106,813 B2
Dynamic prioritization of selector VT scans
Pitamber Shukla, Boise, ID (US); Avinash Rajagiri, Boise, ID (US); and Devin Batutis, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 29, 2022, as Appl. No. 17/733,460.
Claims priority of provisional application 63/291,206, filed on Dec. 17, 2021.
Prior Publication US 2023/0195355 A1, Jun. 22, 2023
Int. Cl. G11C 29/02 (2006.01); G06F 11/07 (2006.01); G11C 29/00 (2006.01); G11C 29/04 (2006.01)
CPC G11C 29/02 (2013.01) [G06F 11/073 (2013.01); G11C 29/006 (2013.01); G11C 2029/0403 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method, comprising:
determining, for a memory die, quality characteristics of the memory die, including:
determining a distance from a particular location on a wafer to a location at which the memory die was fabricated;
altering a threshold voltage applied to the memory die in performance of a select gate scan operation based, at least in part, on the determined quality characteristics of the memory die; and
performing the select gate scan operation by applying signaling having the altered threshold voltage to a select gate of the memory die.