| CPC G11C 11/40618 (2013.01) [G11C 11/40615 (2013.01); G11C 11/4093 (2013.01)] | 28 Claims |
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1. An apparatus for data storage, comprising:
a memory device comprising a plurality of memory banks; and
a memory controller coupled to the memory device, the memory controller being configured to:
perform one or more read batches to the memory device, each read batch comprising a plurality of read commands configured to read data from the memory device;
perform one or more write batches to the memory device, each write batch comprising a plurality of write commands configured to write data to the memory device; and
perform a plurality of refreshes to the plurality of memory banks within a refresh interval, a first portion of the plurality of refreshes being scheduled to occur during the one or more write batches, and a second portion of the plurality of refreshes being scheduled to occur during the one or more read batches, a ratio of an average number of refreshes included in the second portion to an average number of refreshes included in the first portion, being less than one.
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