a first transistor including a first gate coupled to a first node, a first terminal, a second terminal coupled to a second node, and a second gate;

a second transistor including a gate coupled to a writing signal line, a first terminal coupled to a data line, and a second terminal coupled to the first node;

a storage capacitor coupled between the first node and the second node;

a sixth transistor including a first terminal coupled to the second gate of the first transistor;

a seventh transistor including a first terminal coupled to a bias voltage line, and a second terminal coupled to the second gate of the first transistor; and

a light emitting element coupled between the first transistor and a second power supply voltage line,

wherein each frame period of a plurality of frame periods for the pixel includes:

an initialization period in which the first node and the second node are initialized;

a compensation period in which a threshold voltage of the first transistor is compensated;

a data writing period in which a data voltage of the data line is written;

at least one bias period in which the second node is initialized and a bias voltage of the bias voltage line is applied to the second gate of the first transistor; and

at least one emission period in which the light emitting element emits light, and

wherein, in the compensation period, an initialization signal line and the writing signal line have a turn-off level, a reset signal line has a turn-on level to apply a reference voltage to the first node, an emission signal line has the turn-on level, and a voltage of the second node is saturated to a voltage corresponding to the threshold voltage subtracted from the reference voltage.