| CPC G06F 3/061 (2013.01) [G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] | 20 Claims |
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1. A memory controller comprising:
a vector arithmetic logic unit (VALU) for performing scattered atomic memory operations on arrays of data elements; and
an atomic memory operation scheduler for:
scheduling atomic memory operations at the VALU;
identifying a plurality of scattered atomic memory operations with commutative and associative properties, the plurality of scattered atomic memory operations for operating on at least one element of an array of data elements associated with an address; and
commanding the VALU to perform the plurality of scattered atomic memory operations.
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