US 12,105,658 B2
Intra-chip and inter-chip data protection
Pramod Bhardwaj, San Jose, CA (US); Sarosh I. Azad, Fremont, CA (US); Wern-Yan Koe, Cupertino, CA (US); and Amitava Majumdar, San Jose, CA (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Sep. 16, 2021, as Appl. No. 17/477,185.
Prior Publication US 2023/0085149 A1, Mar. 16, 2023
Int. Cl. G06F 13/40 (2006.01); G06F 13/16 (2006.01); G06F 13/28 (2006.01)
CPC G06F 13/4027 (2013.01) [G06F 13/1668 (2013.01); G06F 13/28 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IG), comprising:
a communication network;
data circuitry configured to send a write request over the communication network;
a memory controller configured to receive the write request from the communication network and write data of the write request to a memory device;
first processing circuitry configured to compute a first signature based on the data of the write request and append the first signature to the write request, before the write request is sent to the memory controller over the communication network; and
second processing circuitry configured to receive the write request having the appended first signature, from the communication network, compute a second signature based on the data of the write request, and compare the first signature appended to the write request data to the second signature.