| CPC G06F 11/0793 (2013.01) [G06F 11/008 (2013.01); G06F 11/0706 (2013.01); G06F 11/0724 (2013.01); G06F 11/0757 (2013.01)] | 19 Claims |
|
1. A fault recovery system, comprising:
an electronic circuitry including at least one of a printed circuit board and a system-on-chip, the electronic circuitry comprising:
a first fault management circuit that is electrically coupled with a first functional circuit, wherein the first functional circuit comprises a processor or a memory, and configured to detect a first fault in the first functional circuit and execute a first recovery operation to recover the first functional circuit from the first fault;
a second fault management circuit that is electrically coupled with the first fault management circuit, and configured to execute, based on a failure of the first fault management circuit to execute the first recovery operation within a first predetermined time duration, a second recovery operation to recover the first functional circuit from the first fault; and
a controller that is electrically coupled with the first and second fault management circuits, and configured to:
record an operational state associated with the fault recovery system and a set of rules associated with the first fault;
receive, from the first and second fault management circuits, first and second reporting data when the first and second fault management circuits execute the first and second recovery operations, respectively, wherein the first reporting data and the second reporting data are indicative of the first and second predetermined time durations, respectively; and
estimate a sequence of recovery operations to be executed by the first and second fault management circuits for the first fault based on the operational state, the set of rules, the first and second predetermined time durations, and availability of the first and second fault management circuits during the first and second recovery operations, respectively.
|