US 12,105,125 B2
Digital reconfigurable apparatus for spectrum analysis and intreference rejection
Andrey V. Veitsel, Moscow (RU); Pavel V. Kalmykov, Moscow (RU); Igor A. Orlovsky, Moscow (RU); Victor A. Prasolov, Moscow (RU); and Evgeny N. Sidorov, Moscow (RU)
Assigned to Topcon Positioning Systems, Inc., Livermore, CA (US)
Appl. No. 16/757,639
Filed by Topcon Positioning Systems, Inc., Livermore, CA (US)
PCT Filed Aug. 13, 2019, PCT No. PCT/RU2019/000572
§ 371(c)(1), (2) Date Feb. 18, 2022,
PCT Pub. No. WO2021/029779, PCT Pub. Date Feb. 18, 2021.
Prior Publication US 2024/0085570 A1, Mar. 14, 2024
Int. Cl. G01R 23/167 (2006.01); H04K 3/00 (2006.01)
CPC G01R 23/167 (2013.01) [H04K 3/90 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A digital reconfigurable anti-jam (AJ) apparatus for spectrum analysis and narrow-band interference suppression, the AJ apparatus comprising:
a) a central processing unit (CPU);
b) N dual mode modules (N>2) for spectrum analysis and band rejection (SABR), each SABR module receiving a digital quadrature signal input, outputting a spectral data output to the CPU through an interface, and then outputting a quadrature output with interference band rejected,
wherein the CPU controls the SABR modules parameters and operation mode to first place the SABR modules into a spectral analysis (SA) mode, and upon detection of interference, then to place at least one of the SABR modules into a band rejection (BR) mode for as long as the interference continues;
c) N N-to-1 multiplexers, whose quadrature outputs are connected to quadrature signal inputs of the corresponding SABR modules,
wherein the multiplexers have a control input from the CPU, wherein the control input controls whether to connect an input of each multiplexer either to the digital quadrature signal input or to a quadrature band-reject output of any other SABR module;
d) a (N+1)-to-1 multiplexer controlled by the CPU, through which it can be connected to a quadrature signal input or to a quadrature output of any SABR module;
e) a frequency conversion (FC) module, that receives as input a quadrature output of the (N+1)-to-1 multiplexer and whose output is a filtered quadrature output of the AJ apparatus,
wherein the FC module is controlled by the CPU and executes up/down frequency conversion of a spectrum of the digital quadrature signal input.