US 11,777,018 B2
Layout to reduce current crowding at endpoints
Richard A. Blanchard, Los Altos, CA (US); and Alireza Mojab, Austin, TX (US)
Assigned to IDEAL POWER INC., Austin, TX (US)
Filed by IDEAL POWER INC., Austin, TX (US)
Filed on Nov. 10, 2021, as Appl. No. 17/523,513.
Claims priority of provisional application 63/116,078, filed on Nov. 19, 2020.
Prior Publication US 2022/0157974 A1, May 19, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 29/732 (2006.01)
CPC H01L 29/732 (2013.01) 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having a first hemispherical end and a second hemispherical end each having a radius;
a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap greater than the radius by more than a manufacturing tolerance, and the second end spaced apart from the second hemispherical end by a second gap greater than the radius by more than the manufacturing tolerance.