US 11,775,725 B2
System and computer program product for integrated circuit design
Chin-Shen Lin, Hsinchu (TW); Hiranmay Biswas, Hsinchu (TW); Kuo-Nan Yang, Hsinchu (TW); and Chung-Hsing Wang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Nov. 16, 2021, as Appl. No. 17/527,967.
Application 17/527,967 is a continuation of application No. 16/592,200, filed on Oct. 3, 2019, granted, now 11,205,032.
Claims priority of provisional application 62/753,247, filed on Oct. 31, 2018.
Prior Publication US 2022/0075922 A1, Mar. 10, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 30/392 (2020.01); G06F 30/3308 (2020.01); G06F 30/337 (2020.01); G06F 30/398 (2020.01); G06F 119/06 (2020.01)
CPC G06F 30/392 (2020.01) [G06F 30/337 (2020.01); G06F 30/3308 (2020.01); G06F 30/398 (2020.01); G06F 2119/06 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A system, comprising a processor configured to:
determine a power parameter associated with a cell in an integrated circuit (IC) layout diagram, and
in response to the determined power parameter exceeding a design criterion, perform a modification of the IC layout diagram, the modification comprising at least one of altering a placement of the cell in the IC layout diagram or modifying a power delivery path to the cell,
wherein the power parameter comprises at least one of
a power density of a tile containing the cell,
a voltage drop of the tile containing the cell, or
a voltage drop of the cell.