US 11,775,385 B2
Targeted command/address parity low lift
Aaron P. Boehm, Boise, ID (US); and Scott E. Schaefer, Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 20, 2022, as Appl. No. 17/580,284.
Application 17/580,284 is a continuation of application No. 17/216,418, filed on Mar. 29, 2021, granted, now 11,249,847.
Claims priority of provisional application 63/007,702, filed on Apr. 9, 2020.
Prior Publication US 2022/0147419 A1, May 12, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/10 (2006.01); H03M 13/29 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01); G11C 11/22 (2006.01)
CPC G06F 11/1068 (2013.01) [H03M 13/2906 (2013.01); G11C 11/221 (2013.01); G11C 11/4087 (2013.01); G11C 11/4091 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a write command from a host device via a first set of pins;
receiving data and a first parity bit associated with the write command via a second set of pins;
generating a second parity bit based at least in part on the write command; and
generating a parity result bit based at least in part on the first parity bit and the second parity bit.