US 11,775,312 B2
Look-up table containing processor-in-memory cluster for data-intensive applications
Amlan Ganguly, W. Henrietta, NY (US); Sai Manoj Pudukotai Dinakarrao, Falls Church, VA (US); Mark Connolly, Newfane, NY (US); Purab Ranjan Sutradhar, Rochester, NY (US); Sathwika Bavikadi, Fairfax, VA (US); and Mark Allen Indovina, Rochester, NY (US)
Assigned to Rochester Institute of Technology, Rochester, NY (US)
Filed by Amlan Ganguly, W. Henrietta, NY (US); Sai Manoj Pudukotai Dinakarrao, Falls Church, VA (US); Mark Connolly, Newfane, NY (US); Purab Ranjan Sutradhar, Rochester, NY (US); Sathwika Bavikadi, Fairfax, VA (US); and Mark Allen Indovina, Rochester, NY (US)
Filed on Apr. 11, 2022, as Appl. No. 17/717,947.
Claims priority of provisional application 63/172,902, filed on Apr. 9, 2021.
Prior Publication US 2022/0326958 A1, Oct. 13, 2022
Int. Cl. G06F 9/38 (2018.01); G06F 9/50 (2006.01); G06F 12/0846 (2016.01); G06N 3/063 (2023.01); G06F 9/30 (2018.01)
CPC G06F 9/3887 (2013.01) [G06F 9/3001 (2013.01); G06F 9/5072 (2013.01); G06F 12/0851 (2013.01); G06N 3/063 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A processor-in-memory, comprising:
a PIM cluster configured to read data from and write data to an adjacent DRAM subarray, wherein the PIM cluster comprises a plurality of processing cores, each processing core of the plurality of processing cores containing a look-up table, and a router connected to each processing core, wherein the router is configured to communicate data among each processing core; and
a controller unit configured to communicate with the router, wherein the controller unit contains an executable program of operational decomposition algorithms.