US 11,775,047 B2
System, apparatus and method for dynamically adjusting platform power and performance based on task characteristics
Jianfang Zhu, Portland, OR (US); Deepak Samuel Kirubakaran, Hillsboro, OR (US); Raoul Rivas Toledano, Hillsboro, OR (US); Chee Lim Nge, Beaverton, OR (US); Rajshree Chabukswar, Sunnyvale, CA (US); James Hermerding, II, Vancouver, WA (US); Sudheer Nair, Portland, OR (US); William Braun, Beaverton, OR (US); Zhongsheng Wang, Camas, WA (US); Russell Fenger, Beaverton, OR (US); and Udayan Kapaley, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by INTEL CORPORATION, Santa Clara, CA (US)
Filed on Aug. 2, 2022, as Appl. No. 17/879,256.
Application 17/879,256 is a continuation of application No. 16/830,485, filed on Mar. 26, 2020, granted, now 11,422,616.
Prior Publication US 2022/0374066 A1, Nov. 24, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/32 (2019.01); G06F 1/329 (2019.01); G06F 1/3228 (2019.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01)
CPC G06F 1/329 (2013.01) [G06F 1/3228 (2013.01); G06F 9/3836 (2013.01); G06F 9/4812 (2013.01); G06F 9/4893 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor comprising:
at least one core;
a workload monitor circuit coupled to the at least one core to determine background task metric information based on a first amount of time that the at least one core executed background tasks during an active duration; and
a control circuit coupled to the workload monitor circuit to dynamically apply a power management policy for a background mode when the background task metric information exceeds a first threshold, the power management policy for the background mode to reduce power consumption of at least the processor.