| CPC H10F 39/8037 (2025.01) | 19 Claims |
|
1. A semiconductor device comprising:
a substrate extended in first and second directions crossing each other;
a gate structure disposed on the substrate, the gate structure including first and second sides extended in parallel with the first direction and spaced apart from each other in the second direction, and a third side extended in parallel with the second direction; and
a plurality of source/drain areas of a first conductive type, which are disposed in the substrate,
wherein the plurality of source/drain areas include first and second source/drain areas spaced apart from each other in the second direction and a third source/drain area spaced apart from at least one of the first or second source/drain area in the first direction,
wherein the first and second source/drain areas overlap the first and second sides in a third direction perpendicular to the first and second directions, respectively,
wherein the third source/drain area overlaps one of the third side or a fourth side of the gate structure in the third direction, the fourth side extended in parallel with the first direction and spaced apart from one of the first side or the second side in the first direction,
wherein a length of the first source/drain area in the first direction is the same as a length of the first side in the first direction and a length of the second source/drain area the first direction is the same as a length of the second side in the first direction,
wherein a voltage applied to the first and second source/drain areas and a voltage applied to the third source/drain area operate based on their respective values different from each other, and
wherein from a planar viewpoint, the gate structure is I-shaped.
|