| CPC H10D 89/811 (2025.01) [H10D 89/921 (2025.01)] | 17 Claims |
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1. A semiconductor device comprising:
a signal pad;
a GND pad;
a plurality of drive transistors electrically connected between a power supply line and a GND line via a signal node that is electrically connected to the signal pad; and
an electrostatic protection mechanism for forming a discharge path from the signal pad to the GND pad when an electrical signal is applied to the signal pad,
wherein the plurality of drive transistors include a transistor to be protected including a drain electrically connected to the signal pad,
wherein the electrostatic protection mechanism includes a gate switch circuit for controlling an electrical connection destination of a gate of the transistor to be protected at the time of the application of the electrical signal, and
wherein the gate switch circuit, at the time of the application of the electrical signal, electrically connects the gate to a first node at a potential that is higher than a potential of the GND line at the time of the formation of the discharge path.
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