| CPC H10D 30/6729 (2025.01) [H01L 23/5226 (2013.01); H01L 23/5286 (2013.01); H10D 30/0243 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/116 (2025.01); H10D 64/01 (2025.01); H10D 64/018 (2025.01)] | 20 Claims |

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1. A semiconductor structure, comprising:
a first source/drain feature;
a second source/drain feature;
one or more channel layers connecting between the first source/drain feature and the second source/drain feature;
a gate structure engaging each of the one or more channel layers;
a first silicide layer over a top surface of the first source/drain feature;
a second silicide layer over a top surface of the second source/drain feature;
sidewall silicide layers over side surfaces of the first source/drain feature; and
sidewall dielectric layers over and interfacing side surfaces of the second source/drain feature, wherein each of the sidewall dielectric layers encloses an air gap.
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