US 12,432,940 B2
Semiconductor structure and method for manufacturing same
Jun Xia, Hefei (CN); and Shijie Bai, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on May 26, 2022, as Appl. No. 17/804,178.
Application 17/804,178 is a continuation of application No. PCT/CN2021/135767, filed on Dec. 6, 2021.
Claims priority of application No. 202111298101.8 (CN), filed on Nov. 4, 2021.
Prior Publication US 2023/0133297 A1, May 4, 2023
Int. Cl. H10D 1/00 (2025.01); H10B 12/00 (2023.01); H10D 1/68 (2025.01)
CPC H10D 1/042 (2025.01) [H10D 1/716 (2025.01)] 13 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
forming a stacked structure on a base having an array area and a peripheral area;
forming a first mask layer on the stacked structure, wherein the first mask layer corresponding to the array area has a first pattern;
ion doping the first mask layer on the array area to obtain a doped first mask layer; and
etching the stacked structure through the doped first mask layer to transfer the first pattern to the stacked structure;
wherein
ion doping the first mask layer on the array area to obtain the doped first mask layer comprises:
depositing a sacrificial layer on the first mask layer and the part of the stacked structure;
etching the sacrificial layer on the array area to expose part of the first mask layer on the array area; and
ion doping the exposed first mask layer to obtain the doped first mask layer.