US 12,432,926 B2
Method to produce a 3D multilayer semiconductor device and structure
Zvi Or-Bach, Haifa (IL); and Jin-Woo Han, San Jose, CA (US)
Assigned to Monolithic 3D Inc., Allen, TX (US)
Filed by Monolithic 3D Inc., Klamath Falls, OR (US)
Filed on Aug. 5, 2024, as Appl. No. 18/793,939.
Application 18/793,939 is a continuation in part of application No. 18/622,992, filed on Mar. 31, 2024, granted, now 12,100,658.
Application 18/622,992 is a continuation in part of application No. 16/797,231, filed on Feb. 21, 2020, granted, now 11,978,731, issued on May 7, 2024.
Application 16/797,231 is a continuation in part of application No. 16/224,674, filed on Dec. 18, 2018, abandoned.
Application 16/224,674 is a continuation in part of application No. 15/761,426, granted, now 10,515,981, issued on Dec. 24, 2019, previously published as PCT/US2016/052726, filed on Sep. 21, 2016.
Claims priority of provisional application 62/221,618, filed on Sep. 21, 2015.
Prior Publication US 2024/0397720 A1, Nov. 28, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 43/27 (2023.01); H10B 41/27 (2023.01)
CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method of making a 3D multilayer semiconductor device, the method comprising:
providing a first substrate comprising a first level, said first level comprising a first single crystal silicon layer;
providing a second substrate comprising a second level, said second level comprising a second single crystal silicon layer;
performing an epitaxial growth of a SiGe layer on top of said second single crystal silicon layer;
performing an epitaxial growth of a third single crystal silicon layer on top of said SiGe layer,
wherein said third single crystal silicon layer has an average thickness of less than 2,000 nm;
forming a plurality of second transistors each comprising a single crystal channel;
forming a plurality of metal layers interconnecting said plurality of second transistors; and then
performing a bonding of said second level onto said first level,
wherein performing said bonding comprises making oxide-to-oxide bond zones; and
performing removal of a majority of said second single crystal silicon layer.