US 12,432,917 B2
Three-dimensional memory device including discrete memory elements and method of making the same
Keigo Kitazawa, Nagoya (JP); Ippei Yasuda, Yokkaichi (JP); and Adarsh Rajashekhar, Santa Clara, CA (US)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Oct. 27, 2021, as Appl. No. 17/512,383.
Application 17/512,383 is a continuation in part of application No. 17/001,003, filed on Aug. 24, 2020, granted, now 11,569,260.
Application 17/001,003 is a continuation in part of application No. 16/801,456, filed on Feb. 26, 2020, granted, now 11,244,953.
Prior Publication US 2022/0052073 A1, Feb. 17, 2022
Int. Cl. H10B 41/27 (2023.01); H10B 43/27 (2023.01)
CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A method of forming a three-dimensional memory device, comprising:
forming an alternating stack of in-process composite layers and sacrificial material layers over a substrate, wherein each of the in-process composite layers comprises a lower insulating layer, a sacrificial spacer layer comprising silicon nitride or a semiconductor material, and an upper insulating layer;
forming a memory opening vertically extending through the vertical stack;
forming a memory opening fill structure in the memory opening, the memory opening fill structure comprising an in-process memory film and a vertical semiconductor channel;
forming backside trenches through the alternating stack;
performing a first selective isotropic etch process employing an etch chemistry that etches the sacrificial spacer layers of the alternating stack selectively to materials of the lower insulating layers, the upper insulating layers, and the sacrificial material layers of the alternating stack while sidewalls of the lower insulating layers, the upper insulating layers, and the sacrificial material layers of the alternating stack are exposed to the backside trenches to form lateral cavities in volumes from which the sacrificial spacer layers are exposed;
filling the lateral cavities with replacement dielectric layers having a different material composition than the sacrificial spacer layers to convert the in-process composite layers into composite insulating layers; and
replacing the sacrificial material layers with electrically conductive layers by removing the sacrificial material layers by performing a second selective isotropic etch process that etches the sacrificial material layers selectively to materials of the lower insulating layers, the upper insulating layers, and the replacement dielectric layers while sidewalls of the lower insulating layers, the upper insulating layers, and the replacement dielectric layers are exposed to the backside trenches to form backside recesses and by depositing an electrically conductive material in the backside recesses after formation of the composite insulating layers.