US 12,432,471 B2
Image signal detection circuit, control method and motion detection method
Xi Zeng, Shanghai (CN); and Xuehong He, Shanghai (CN)
Assigned to SHANGHAI IC R&D CENTER CO., LTD., Shanghai (CN)
Appl. No. 18/270,254
Filed by SHANGHAI IC R&D CENTER CO., LTD., Shanghai (CN); and CHENGDU IMAGE DESIGN TECHNOLOGY CO., LTD., Sichuan (CN)
PCT Filed Dec. 24, 2021, PCT No. PCT/CN2021/141210
§ 371(c)(1), (2) Date Jun. 29, 2023,
PCT Pub. No. WO2022/143462, PCT Pub. Date Jul. 7, 2022.
Claims priority of application No. 202011612131.7 (CN), filed on Dec. 30, 2020.
Prior Publication US 2024/0056698 A1, Feb. 15, 2024
Int. Cl. H04N 25/76 (2023.01); H04N 5/14 (2006.01); H04N 23/60 (2023.01)
CPC H04N 25/76 (2023.01) [H04N 5/144 (2013.01); H04N 23/60 (2023.01)] 10 Claims
OG exemplary drawing
 
1. An image signal detection circuit, comprising at least one acquisition module, each of which comprising at least one acquisition sub-module; wherein the acquisition sub-module comprises a first switch, a second switch and a capacitor;
one end of the first switch is set as an input end of the acquisition sub-module and is connected to a pixel signal source, the other end of the first switch is connected to a first end of the capacitor;
a second end of the capacitor is set as an output end of the acquisition sub-module, and is connected to one end of the second switch;
the other end of the second switch is connected to a reference voltage source;
the image signal detection circuit further comprises at least one comparison module, each of which comprising a comparator, a logic unit, at least one third switch, a fourth switch and a fifth switch, wherein,
an output end of each of the acquisition sub-modules is connected to a first input end of the comparator, and the acquisition sub-modules are respectively connected to the comparator through different third switches;
a second input end of the comparator is connected to a lower limit voltage source through the fourth switch, and is also connected to an upper limit voltage source through the fifth switch;
the comparator is configured to output a first signal when a signal at the first input end is greater than a signal at the second input end, and output a second signal when the signal at the first input end is less than the signal at the second input end;
the logic unit is configured to receive the first signal or the second signal output by the comparator and output a signal according to preset logic.