US 12,431,905 B2
MRAM device with integrated controller for FPGA system and methods therefor
Syed M. Alam, Austin, TX (US); and Sanjeev Aggarwal, Scottsdale, AZ (US)
Assigned to Everspin Technologies, Inc., Chandler, AZ (US)
Filed by Everspin Technologies, Inc., Chandler, AZ (US)
Filed on Jun. 6, 2023, as Appl. No. 18/329,793.
Claims priority of provisional application 63/350,581, filed on Jun. 9, 2022.
Prior Publication US 2023/0403011 A1, Dec. 14, 2023
Int. Cl. H03K 19/1776 (2020.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); H10B 61/00 (2023.01); H10N 50/10 (2023.01)
CPC H03K 19/1776 (2013.01) [H01L 23/481 (2013.01); H01L 23/49816 (2013.01); H10B 61/00 (2023.02); H10N 50/10 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a printed circuit board;
a magnetoresistive random-access memory (MRAM) device coupled to the printed circuit board;
a controller or control circuitry, wherein the controller or control circuitry is integrated into, embedded in, or otherwise incorporated into the MRAM device; and
a field programmable gate array (FPGA) coupled to the printed circuit board and in communication with the controller or control circuitry,
wherein the MRAM device includes at least one memory bank and at least one error correction code datapath.