US 12,431,479 B2
Method of manufacturing semiconductor package
Jakyoung Gu, Suwon-si (KR); Minsoo Kim, Suwon-si (KR); Jihye Shim, Suwon-si (KR); and Kyoungok Jung, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 24, 2023, as Appl. No. 18/125,958.
Claims priority of application No. 10-2022-0092757 (KR), filed on Jul. 26, 2022.
Prior Publication US 2024/0038549 A1, Feb. 1, 2024
Int. Cl. H01L 25/00 (2006.01); H01L 21/027 (2006.01); H01L 21/033 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/4757 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 25/065 (2023.01)
CPC H01L 25/50 (2013.01) [H01L 21/0274 (2013.01); H01L 21/0275 (2013.01); H01L 21/0332 (2013.01); H01L 21/31058 (2013.01); H01L 21/311 (2013.01); H01L 21/31127 (2013.01); H01L 21/31133 (2013.01); H01L 21/31144 (2013.01); H01L 21/47573 (2013.01); H01L 21/4846 (2013.01); H01L 21/4857 (2013.01); H01L 23/498 (2013.01); H01L 23/49811 (2013.01); H01L 23/49838 (2013.01); H01L 25/105 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06548 (2013.01)] 20 Claims
OG exemplary drawing
 
19. A method of manufacturing a semiconductor package, the method comprising:
preparing a substrate that extends in a horizontal direction and comprises a chip mounting area and a connection area surrounding the chip mounting area;
forming a redistribution layer on the substrate in the chip mounting area and the connection area, the redistribution layer comprising a plurality of conductive patterns;
forming a photoresist film on the redistribution layer in the chip mounting area and the connection area to cover the plurality of conductive patterns, the photoresist film comprising a negative-type photoresist;
forming a photoresist pattern from the photoresist film by a photolithography process using a photomask that comprises a plurality of transparent areas, a plurality of light-shielding areas, and at least one semi-transparent area, wherein the at least one semi-transparent area transmits only a portion of light incident thereon, wherein the photoresist pattern comprises a plurality of local patterns respectively having different vertical heights from each other to define:
a plurality of via holes, which are arranged in the connection area and each expose one conductive pattern from among the plurality of conductive patterns, and
at least one recessed portion, which is arranged in the chip mounting area and has a lower surface that exposes a portion of the photoresist pattern under the lower surface;
forming a plurality of conductive posts respectively only in the plurality of via holes without forming a conductive post in the at least one recessed portion;
exposing at least one conductive pattern from among the plurality of conductive patterns in the chip mounting area by removing the photoresist pattern by applying a photoresist stripping composition to the photoresist pattern; and
mounting a semiconductor chip on the redistribution layer in the chip mounting area such that the semiconductor chip is electrically connected to the at least one conductive pattern.