US 12,431,209 B2
Memory devices, operating methods of the memory devices, and test systems including the memory devices
Wonyoung Choi, Suwon-si (KR); Gilyoung Kang, Suwon-si (KR); Sungrae Kim, Suwon-si (KR); Hyeran Kim, Suwon-si (KR); Jeongseok Park, Suwon-si (KR); and Changkyu Seol, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 14, 2023, as Appl. No. 18/134,776.
Claims priority of application No. 10-2022-0061654 (KR), filed on May 19, 2022; and application No. 10-2022-0115178 (KR), filed on Sep. 13, 2022.
Prior Publication US 2023/0377669 A1, Nov. 23, 2023
Int. Cl. G11C 29/14 (2006.01); G11C 29/36 (2006.01); G11C 29/38 (2006.01)
CPC G11C 29/36 (2013.01) [G11C 29/14 (2013.01); G11C 29/38 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a decoder group configured to receive a plurality of codewords each including a plurality of symbols from an external device that is external of the memory device, the plurality of codewords including a plurality of normal codewords, and a plurality of illegal codewords which are mutually distinct, and configured to decode the plurality of normal codewords into a plurality of data patterns and the plurality of illegal codewords into a plurality of fixed patterns having an identical value;
a memory cell array configured to receive the plurality of data patterns and the plurality of fixed patterns from the decoder group and configured to store the plurality of data patterns and the plurality of fixed patterns, the memory cell array including a plurality of memory cells; and
an encoder configured to encode the plurality of data patterns read from the memory cell array into a plurality of first codewords and the plurality of fixed patterns read from the memory cell array into a plurality of second codewords having an identical value and to output the plurality of first codewords and the plurality of second codewords to the external of the memory device.