US 12,431,175 B2
Self-reference storage structure and in-memory computing circuit
Guozhong Xing, Beijing (CN); Huai Lin, Beijing (CN); Yu Liu, Beijing (CN); Kaiping Zhang, Beijing (CN); Kangwei Zhang, Beijing (CN); Hangbing LV, Beijing (CN); Changqing Xie, Beijing (CN); Qi Liu, Beijing (CN); Ling Li, Beijing (CN); and Ming Liu, Beijing (CN)
Assigned to INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES, Beijing (CN)
Appl. No. 18/247,446
Filed by INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES, Beijing (CN)
PCT Filed Jan. 4, 2021, PCT No. PCT/CN2021/070110
§ 371(c)(1), (2) Date Mar. 30, 2023,
PCT Pub. No. WO2022/073311, PCT Pub. Date Apr. 14, 2022.
Claims priority of application No. 202011077197.0 (CN), filed on Oct. 10, 2020.
Prior Publication US 2024/0005974 A1, Jan. 4, 2024
Int. Cl. G11C 11/00 (2006.01); G11C 11/16 (2006.01)
CPC G11C 11/161 (2013.01) [G11C 11/1659 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A self-reference storage structure, comprising:
three transistors comprising a first transistor, a second transistor and a third transistor; and
two magnetic tunnel junctions comprising a first magnetic tunnel junction and a second magnetic tunnel junction;
wherein the first magnetic tunnel junction is connected in series between the first transistor and the second transistor;
the second magnetic tunnel junction is connected in series between the second transistor and the third transistor; and
one bit of binary information is written when the first transistor, the second transistor and the third transistor are controlled to turn on;
wherein the first magnetic tunnel junction and the second magnetic tunnel junction both comprise:
a spin-orbit coupling layer, a ferromagnetic free layer, a tunneling layer, a ferromagnetic reference layer, and a top electrode, from bottom to top,
wherein the ferromagnetic free layer and the ferromagnetic reference layer are both any one of following magnetic materials having perpendicular anisotropies:
CoFeB, Co2FeAl, CO, CoFe, Fe3GeTe2, and Ni3GeTe2;
wherein the self-reference storage structure further comprises:
a word line, a first bit line, a second bit line, a read/write control line and a source line;
wherein a gate of the first transistor and a gate of the third transistor are both connected to the word line, and a gate of the second transistor is connected to the read/write control line;
the top electrode of the first magnetic tunnel junction and the top electrode of the second magnetic tunnel junction are both connected to the source line; and
a drain of the first transistor is connected to the first bit line, and a drain of the third transistor is connected to the second bit line.