| CPC G09G 3/3233 (2013.01) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2340/0435 (2013.01)] | 19 Claims |

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1. A pixel circuit, comprising:
a driving transistor including a control electrode, a first electrode and a second electrode;
a reset sub-circuit, electrically connected to a first scanning signal terminal, a reference voltage signal terminal and the first electrode of the driving transistor, and configured to, under control of a first scanning signal from the first scanning signal terminal, transmit a reference voltage signal from the reference voltage signal terminal to the first electrode of the driving transistor;
a leakage prevention sub-circuit, electrically connected to a second scanning signal terminal, and the first electrode and the control electrode of the driving transistor, and configured to, under control of a second scanning signal from the second scanning signal terminal, connect the first electrode of the driving transistor to the control electrode of the driving transistor; and
a data writing sub-circuit, electrically connected to a third scanning signal terminal, a data signal terminal and the second electrode of the driving transistor, and configured to, under control of a third scanning signal from the third scanning signal terminal, transmit a data signal from the data signal terminal to the second electrode of the driving transistor, wherein
the reset sub-circuit and the data writing sub-circuit are configured to, under the control of respective scanning signals, be turned on sequentially in a case where the leakage prevention sub-circuit is turned on;
the reset sub-circuit is configured to, under the control of the first scanning signal, be turned on at least once in a case where the leakage prevention sub-circuit is turned off; and
in the case where the leakage prevention sub-circuit is turned off, the data writing sub-circuit is configured to, under the control of the third scanning signal, be turned on at least once, and the data signal terminal is configured to output a first reset voltage signal.
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