US 12,430,259 B2
System and method of address mapping for saving memory macro address bus toggle power
Jang Dae Kim, San Jose, CA (US)
Assigned to Samsung Electronics Co., Ltd., Seoul (KR)
Filed by Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed on Oct. 20, 2023, as Appl. No. 18/491,342.
Claims priority of provisional application 63/507,618, filed on Jun. 12, 2023.
Prior Publication US 2024/0411699 A1, Dec. 12, 2024
Int. Cl. G06F 12/00 (2006.01); G06F 12/10 (2016.01)
CPC G06F 12/10 (2013.01) [G06F 2212/1028 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first address mapper; and
a first memory macro connected to the first address mapper,
wherein the first address mapper is configured to:
determine if an input address falls within a first address range mapped to the first memory macro,
in response to determining that the input address falls within the first address range mapped to the first memory macro, access the first memory macro with an address on an address bus of the first memory macro mapped from the input address, and
in response to determining that the input address does not fall within the first address range mapped to the first memory macro, prevent access to the first memory macro and set the address bus of the first memory macro to a value that depends on whether the input address is lower or higher than the first address range.