US 12,430,256 B2
Unloaded cache bypass
Emanuele Confalonieri, Segrate (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 27, 2023, as Appl. No. 18/215,115.
Claims priority of provisional application 63/356,378, filed on Jun. 28, 2022.
Prior Publication US 2023/0418755 A1, Dec. 28, 2023
Int. Cl. G06F 12/0888 (2016.01)
CPC G06F 12/0888 (2013.01) [G06F 2212/60 (2013.01)] 18 Claims
OG exemplary drawing
 
15. A method, comprising:
determining, by a memory controller coupled to a memory device, a quantity of pending cache look-up operations in a queue associated with a cache responsive to receiving a host access request;
determining the quantity of pending cache look-up operations is less than or equal to an unloaded bypass threshold that is variable based on a cache hit rate of cache look-up operations associated with the cache; and
responsive to determining the quantity of pending cache look-up operations is less than or equal to the unloaded bypass threshold:
causing performance of a bypass read operation that bypasses the cache and accesses the memory device via a switch of the memory controller that is coupled to the memory device; and
causing performance of a cache look-up operation associated with the cache substantially contemporaneously with the performance of the bypass read operation.