| CPC G06F 8/452 (2013.01) [G06F 9/3853 (2013.01); G06F 13/28 (2013.01); G06N 3/04 (2013.01)] | 14 Claims |
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1. A compiler-implemented method comprising:
receiving a dataflow graph of a neural network, the neural network comprising a neural network operator;
receiving information indicating a quantity of computation resources and a quantity of memory resources of a hardware accelerator assigned to execute the neural network operator;
generating, based on the dataflow graph, a loop-nest of the neural network operator, wherein elements of a first tensor are associated with first indices determined by a first induction variable of a parent loop of the loop-nest, and wherein elements of a second tensor are associated with second indices determined by a second induction variable of a child loop nested within the parent loop;
determining, based on the information and based on a first modulo operator applied to the first indices and a second modulo operator applied to the second indices to map the first and second indices to remainders, a number of iterations to be included in a batch to access the first tensor and the second tensor, wherein the number of iterations in the batch are to be executed in parallel by the hardware accelerator;
generating a schedule of execution of a set of batches including the batch; and
generating executable instructions to be executed by the hardware accelerator based on the schedule of execution.
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